This invention pertains generally to analog divider circuitry and more particularly to circuitry of such type which is adapted to operate with analog signals having relatively large dynamic ranges.
As is known in the art, it is sometimes required to divide the level of one analog signal by the level of a second analog signal, as in the normalization of the azimuth and elevation signals in a monopulse radar receiver when such signals are divided by the sum signal of such receiver. One known approach used to accomplish such normalization contemplates the use of automatic gain controlled (AGC'd) amplifiers disposed in the azimuth and elevation channels, the gain of such amplifiers being controlled by signals produced in accordance with the level of the signal in the sum channel. While such technique has been found to be adequate in many applications, it has been found generally to be inadequate where the levels of the signals involved in the normalization or division process have a relatively wide dynamic range, say in the order of 60 db or more.
Another type of normalization is performed by the use of so-called logarithmic dividers. Here signals are developed representative of the logarithms of the "numerator" analog signal and the "denominator" analog signal. The "logarithm" signals are passed to a differencing network and then to a so-called "antilogarithm" amplifier to complete the division process. While such logarithmic dividers have also been found to be adequate in many applications, the accuracy of such dividers may degrade to an unacceptable level when the magnitude of the numerator signal is very close to the magnitude of the denominator signal. When such a condition exists, the antilogarithm amplifier is actuated by relatively small level input signals with a concomitant reduction in sensitivity. Further, such logarithmic dividers generally require that both the numerator signal and the denominator signal be of the same polarity, thereby limiting the applications in which such devices may be used.